08.45: Conference Opening
Gilbert Declerck
09.00: Joint Plenary Keynote Presentation 1
Chair: Gilbert Declerck, IMEC, Leuven, Belgium
Speaker: Carel van der Poel, Philips, The Netherlands
“On Ambient Intelligence, Needful
Things and Process Technology”
09.40: Coffee Break
Chair: Yann Deval, BTS Audivisual, Draguignan, France
10.25: C1.1: A wideband high-linearity RF receiver front-end in CMOS
V.J. Arkesteijn, E.A.M. Klumperink, B. Nauta
MESA+, University of Twente, Enschede, The Netherlands
10.50: C1.2: Silicon bipolar Up and Down-converters for 5 GHz WLAN applications
E. Ragonese, A. Italia, L. La Paglia1, G. Palmisano
DIEES, University of Catania, Italy
1STMicroelectronics, Catania, Italy
11.15: C1.3: An
integrated low power CMOS baseband analog design for direct conversion receiver
(S)
M. Lee, I. Kwon1, K. Lee1
Telecommunications Network, Samsung Electronics, Suwon, Korea
1KAIST, Daejeon, Korea
C1.4: 60
GHz transceiver circuits in SiGe:C BiCMOS technology (S)
W. Winkler, J. Borngräber, H. Gustat, F. Korndörfer
IHP, Frankfurt (Oder), Germany
11.40: C1.5: L1/2 Dual-band CMOS GPS receiver
J. Kim, S. Cho, J. Ko
PHYCHIPS Inc., Daejeon, Korea
12.05: C1.6: 2.4 GHz receiver for sensor applications
J.A. Järvinen, J. Kaukovuori, J. Ryynänen, J. Jussila1, K. Kivekäs1, K.A.I. Halonen
Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland
1Nokia Research center, Helsinki, Finland
Chair: William Redman-White, Southampton University, United Kingdom
10.25: C2.1: A multi-continuously-tunable lowpass filter for zero-IF mobile applications
D. Chamla1,2, A. Kaiser1, A. Cathelin2, D. Belot2
1IEMN/ISEN, Lille, France
2STMicroelectronis, Crolles, France
10.50: C2.2: Low-power widely tunable Gm-C filter with an adaptive DC blocking, triode-biased MOSFET transconductor
S. Hori, T. Maeda, N. Matsuno, H. Hida
System Devices Research Laboratories, NEC Corp., Tsukuba, Japan
11.15: C2.3: A Gm-C baseband filter with automatic frequency tuning for a direct conversion IEEE802 wireless LAN receiver
B. Shi, W. Shan
Institute for Infocomm Research, Singapore Science Park II, Singapore
11.40: C2.4: Temperature stabilized tunable Gm-C filter for very low frequencies
P. Bruschi, G. Barillaro, F. Pieri, M. Piotto1
University of Pisa, Italy
1IEIIT-Sezione di Pisa, CNR, Pisa, Italy
12.05: C2.5: A highly linear pseudo-differential transconductance (S)
F. Bahmani, E. Sánchez-Sinencio
Department Electrical Engineering, Texas A&M University, U.S.A.
C2.6: A
high-linear 160 MHz CMOS PGA (S)
B. Calvo, S. Celma, M.T. Sanz
Electronic Design, University of Zaragoza, Spain.
Session C3: FREQUENCY GENERATION CIRCUITS
Chair: Marc Tiebout, Infineon, Munich, Germany
10.25: C3.1: Performance degradation of an LC-tank VCO by impact of digital switching noise
C. Soens1,2, G. van der Plas1, P. Wambacq1,2, S. Donnay1
1IMEC, Leuven, Belgium
2Free University of Brussels (VUB), Brussel, Belgium
10.50: C3.2: A technique to reduce flicker noise up-conversion in CMOS LC voltage-controlled oscillators
H.N. Shanan, M.P. Kennedy1
Analog Devices, Ireland
1Department of Microelectronic Engineering, University College Cork, Ireland
11.15: C3.3: A harmonic quadrature LO generator using a 90º delay-locked loop
J. Craninckx, V. Gravot, S. Donnay
IMEC, Leuven. Belgium
11.40: C3.4: LC-oscillators above 100 GHz in silicon-based technology (S)
W. Winkler, J. Borngräber, B. Heinemann
IHP, Frankfurt (Oder), Germany
C3.5: 55
GHz CMOS frequency divider with 32 GHz locking range (S)
K. Yamamoto, M. Fujishima
School of Frontier Sciences, University of Tokyo, Kashiwa, Japan
12.05: C3.6: A wideband CMOS VCO for zero-IF GSM-CDMA single-chip transceiver (S)
K. Manetakis, D. Jessie, C. Narathong
Qualcomm CDMA Technologies, San Diego, U.S.A.
12.30: Lunch Break
14.00: Joint Plenary Keynote Presentation 2
Chair: Michiel Steyaert, KU Leuven, Belgium
Speaker: Takayasy Sakurai, University of Tokyo, Japan
“Low power digital
circuits”
14.45: ESSCIRC Plenary Session 1
Chair: M. Punzenberger, Infineon, Germany
Speaker: John Farserotu, CSEM, Lausanne, Switzerland
"UWB considerations for MAGNET (My "Personal Global Adaptive Network”) systems"
Session C4: AMPLIFIERS
Chair: Manfred Punzenberger, Infineon, Germany
15.25: C4.1: Transconductance with capacitances feedback compensation for multistage amplifiers
X. Peng, W. Sansen
ESAT-MICAS, KU Leuven, Leuven, Belgium
15.50: C4.2: A 0.5 V bulk-input fully differential operational transconductance amplifier
S. Chatterjee, Y. Tsividis, P. Kinget
Dept Electrical Engineering, Columbia University, New York, U.S.A.
16.15: C4.3: A 14 V high speed driver in 5 V only 0.35 mm standard CMOS
D. Killat, O. Salzmann, A. Baumgärtner
Dialog Semiconductor, Kirchheim-Teck, Germany
Session C5: DIGITAL ANALOG CONVERSION
Chair: Miki Moyal, Xignal, Germany
15.25: C5.1: A 0.22 mm2 7.25 mW per-channel audio stereo-DAC with 97 dB-DR and 39 dB SNRout
V. Colonna, M. Annovazzi, G. Boarin, G. Gandolfi, F. Stefani, A. Baschirotto1
STMicroelectronics, Cornaredo, Italy
1Department of Engineering, University of Lecce, Italy
15.50: C5.2: A digital modulator with bandpass delta-sigma modulator (S)
J. Sommarek, J. Vankka, J. Ketola, J. Lindeberg, K. Halonen
Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland
C5.3:
Low-Power 14-bit current steering DAC for ADSL 2+/CO applications in 0.13
mm CMOS
(S)
D. Giotta, P. Pessl, M. clara, W.Klatzer, R. Gaggl
Infineon Technologies Austria, Villach, Austria
16.15: C5.4: A 14 bit 130 MHz CMOS current-steering DAC with adjustable INL (S)
T. Chen, P. Geens, G. Van der Plas, W. Dehaene, G. Gielen
ESAT-MICAS, KU Leuven, Leuven, Belgium
Session C6: LOW POWER TECHNIQUES FOR DIGITAL
Chair: Harry Veendrick, Philips Research, Eindhoven, The Netherlands
15.25: C6.1: A power cut-off technique for gate leakage suppression
M. Draždžiulis, P. Larsson-Edefors, D. Eckerbert, H. Eriksson
VLSI Research Group, Chalmers University of Technology, Göteborg, Sweden
15.50: C6.2: Efficiency of body biasing in 90 nm CMOS for low power digital circuits
K. von Arnim1,2, E. Borinski1,3, P. Seegebrecht2, H. Fiedler3, R. Brederlow1, R. Thewes1, J. Berthold1, C. Pacha1
1Infineon Technologies, Munich, Germany
2Christian-Albrechts University Kiel, Kiel, Germany
3University of Dortmund, Germany
16.15: C6.3: Charge recycling sense amplifier based logic: securing low power security IC’s against DPA
K. Tiri1, I. Verbauwhede1,2
UCLA Electrical Engineering Department, California, U.S.A.
KU Leuven, Leuven, Belgium
16.40: Coffee Break
Session C7: SIGMA DELTA CONVERTERS
Chair: Piero Malcovati, University of Pavia, Italy
17.00: C7.1: A 3 mW continuous-time ED-modulator for EDGE/GSM with high adjacent channel tolerance
M. Schimper, L. Dörrer1, E. Riccio, G. Panov
Infineon Technologies, Munich, Germany
1Infineon Technologies Austria, Villach, Austria
17.25: C7.2: A Sigma-Delta modulator with bitstream-controlled dynamic element matching
M.A.P. Pertijs, J.H. Huijsing
DIMES, Delft University of Technology, The Netherlands
17.50: C7.3: A 120 dB 300 mW stereo audio A/D converter with 110 dB THD+N (S)
A. Prasad, A. Chokhawala, K. Thompson, J. Melanson
1Cirrus Logic, Austin, U.S.A.
Session C8: RF TRANSMITTERS
Chair: Damien Macq, Université de Mons, Belgium
17.00: C8.1: A 48-860 MHz TV splitter amplifier exhibiting an HP2 and HP3 of 94 dBmV and 73 dBmV
J. van Sinderen, M. Notten, E. Stikvoort, F. Seneschal
1Philips Research Laboratories, Eindhoven, The Netherlands
2Philips Semiconductor, Caen, France
17.25: C8.2: A 5.0 mW 0dB FSK transmitter for 315/433 MHz ISM applications in 0.25 mm CMOS
N. Boom, W. Rens, J. Crols
AnSem, Heverlee, Belgium
17.50: C8.3: A 5.2 GHz silicon bipolar power amplifier for IEEE 802.11a and HIPERLAN2 wireless LANs
A. Scuderi, F. Carrara1, G. Palmisano1
STMicroelectronics, Catania, Italy
1DIEES, University of Catania, Catania, Italy
Session C9: MEMORIES
Chair: Wim Dehaene, KU Leuven, Belgium
17.00: C9.1: 4 Mb MOSFET-selected phase-change memory experimental chip
F. Bedeschi1, R. Bez2, C. Boffino3,4, E. Bonizzoni, E. Buda1, G. Casagrande1, L. Costa1, M. Ferraro1, R. Gastaldi1, O. Khouri1, F. Ottogalli2, F. Pellizzer2, A. Pirovano2, C. Resta1,3, G. Torelli3, M. Tosi2
1STMicroelectronics, Agrate-Brianza,Italy
2STMicroelectronics, Central R&D, Agrate-Brianza, Italy
3University of Pavia, Italy
17.25: C9.2: Variability analysis for sub-100 nm PD/SOICMOS SRAM cell
R.V. Joshi, S. Mukhopadhyay1, D.W. Plass2, Y.J. Chan2, C.-T. Chuang, A. Devgan
IBM T.J. Watson Research Center, Yorktown Heights, U.S.A.
1Purdue University, West Lafayette, U.S.A.
2IBM Systems Group, Poughkeepsie, U.S.A.
17.50: C9.3: A high density, low leakage, 5T SRAM for embedded caches (S)
I. Carlson, S. Andersson, S. Natarajan, A. Alvandpour
Department Electrical Engineering, Linköping University, Sweden
C9.4: The impact
of random doping effects on CMOS SRAM cell (S)
B. Cheng, S. Roy, A. Asenov
Device Modeling Group, University of Glasgow, Scotland
19.00: Welcome Reception
08.40: Joint Plenary Keynote Presentation 2
Chair: Robert Mertens, IMEC, Belgium
Speaker: Roland Thewes, Infineon, Germany
“Integrated circuits for the
biology to silicon interface”
09.20: Coffee Break
09.45: ESSCIRC Plenary Session 2
Chair: P. Mole, Elantec Semiconductor, UK
Speaker: Martin Vertregt, Philips, The Netherlands
"The impact of CMOS scaling on analog CMOS
circuit design and performance"
Chair: Peter Mole, Elantec Semiconductor, UK
10.25: C10.1: A 2.4 GHz bandwidth OEIC with voltage-up-converter
R. Swoboda, J. Knorr, H. Zimmermann
Vienna University of Technology, Austria
10.50: C10.2: Ultra high-compliance CMOS current mirrors for low voltage charge pumps and references
O. Charlon1, W. Redman-White1,2
1Philips Semiconductors, San Jose, U.S.A.
2University of Southampton, United Kingdom
11.15: C10.3: Power-efficient super class AB OTAs
A.J. López-Martin, S. Baswa, J. Ramirez-Angulo, R.G. Carvajal
1Public University of Navarra, Pamplona, Spain
2New Mexico State University, Las Cruces, U.S.A.
3Dept. Electronic Engineering, University of Seville, Spain
11.40: C10.4: A CMOS V-I converter with 75 dB SFDR and 360 mW power consumption
S. Ouzounov, E. Roza1, H. Hegt, G. van der Weide1, A. van Roermond
Eindhoven University of Technology, The Netherlands
1Philips Research Laboratories, Eindhoven, The Netherlands
12.05: C10.5: 1.5 GHz opamp in 120 nm digital CMOS (S)
F. Schlögl, H. Zimmermann
Technical University Wien, Austria
C10.6:
Thermally optimized demagnetization of inductive loads (S)
W. Horn, P. Singerl
Infineon Technologies Austria, Villach, Austria
Chair: Klaas Bult, Bradcom Netherlands, Netherlands
10.25: C11.1: A 97 mW 110
MS/s pipeline ADC implemented in a 0.18 mm
digital CMOS
T.N. Anderson, A. Briskemyr, F. Telstø, J. Bjørnsen, T.E. Bonnerud, B. Hernes, Ø. Modsvor
1Nordic VLSI AS, Trondheim, Norway
10.50: C11.2: A 0.11
mm2 low-power A/D-converter cell for 10b 10 MS/s
operation
D. Muthers, R. Tielers
University of Kaiserslautern, Germany
11.15: C11.3: A 2.7 mW 1 MPSps 10b analog-to-digital converter with built-in reference buffer and 1 LSB accuracy programmable input ranges
P. Confalonieri, M. Zamprogno, F. Girardi, G. Nicollini, A. Nagari
STMicroelectronics, Agrate-Brianza, Italy
11.40: C11.4: A configurable time-interleaved pipeline ADC for multi-standard wireless receivers (S)
V. Xia, A. Valdes-Garcia, E. Sánchez-Sinencio
Analog and Mixed signal center, Texas A&M University, U.S.A.
Chair: Angel Rodríguez-Vázquez, IMSE-SNM (CSIC), Sevilla, Spain
10.25: C12.1: A 1.8 V, 10 Gbps fully integrated CMOS optical receiver analog front end
W.-Z. Chen, Y.-L. Cheng1, D.-S.Lin
Dept Electronics Engineering, National Chiao-Tung University, Hsin-Chu, Taiwan
1Dept Electrical Engineering, National Central University, Chung-Li, Taiwan
10.50: C12.2: Optical receiver IC for CD/DVD/blue-laser applications
J. Sturm, M. Leifhelm, H. Schatzmayyr, S. Groiss, H. Zimmerman1
Infineon Technologies Austria, Villach, Austria
1Technical University Vienna EMST, Wien, Austria
11.15: C12.3: Design of low noise CMOS OEIC for blu-ray disc optical storage systems (S)
M. Giardina, A Stek, G.W. de Jong, J.R.M. Bergervoet
Philips Research, Eindhoven, The Netherlands
C12.4:
Two high-speed optical front-ends with integrated photodiodes in standard 0.18
mm CMOS
(S)
C. Hermans, P.Leroux, M. Steyaert
ESAT-MICAS,KU Leuven, Leuven, Belgium
11.40: C12.5: 5 Gbps 0.35 mm CMOS driver for laser diode or optical modulator
L. Ti, T. Huang, J. Feng, Z. Wang, M. Xiong
Institute of RF-& OE –ICs, Southeast University, Nanjing, China
12.05: C12.6: Burst-mode transmitter for 1.25 Gbs/s Ethernet PON applications
Y.-H. Oh, Q. Le, S.-G. Lee, N.D.B. Yen, H.-Y. Kang1, T.-W. Yoo1
Information and Communications University (ICU), Daejeon, Korea
1ETRI, Daejeon, Korea
12.30: Lunch Break
14.00: Joint Plenary Keynote Presentation 3
Chair: Rudolf Koch, Infineon, Germany
Speaker: Quitung Huang, Integrated Systems Laboratory, ETH, Switzerland
“Low voltage and low power
aspects of data converter design”
Session C13: RF AMPLIFIERS
Chair: Sven Matissen, Ericsson Mobile, Sweden
15.00: C13.1: An inductor-based 52 GHz 0.18 mm SiGe HBT cascode LNA with 22 dB gain
M. Gordon, S.P. Voinigescu
University of Toronto, Canada
15.25: C13.2: A 5 GHz fully integrated ESD-protected low-noise amplifier in 90 nm RF CMOS
D. Linten1,2, S.Thys1, M.I. Natarajan1, P. Wambacq1,2, W. Jeamsaksiriv1, J. Ramos1, A. Mercha1, S. Jenei1, S. Donnay1, S. Decoutere1
1IMEC, Leuven, Belgium
2Free University Brussels (VUB), Brussels, Belgium
15.50: C13.3: A 5 GHz low-noise amplifier with inductive ESD protection exceeding 3 kV HBM
P. Leroux, M. Steyaert
ESAT-MICAS, KU Leuven, Leuven, Belgium
Session C14: SYSTEM ON CHIP
Chair: T. Noll, RWTH Aachen University, Germany
15.00: C14.1: A digital CMOS micro-hotplate array for analysis of environmentally relevant gases
E. Frey, M. Graf, S. Taschini, K.-U. Kirstein, C. Hagleitner1, A. Hierlemann, H. Baltes
Physical Electronics Laboratory, ETH Zurich, Switzerland
1IBM Research, Zurich Research Laboratory, Rüschlikon, Switzerland
15.25: C14.2: VLSI implementation of the sphere decoding algorithm
A. Burg, M. Wenk, M. Zellweger, M. Wegmueller, N. Felber, W. Fichtner
Integrated Systems Laboratory, ETH Zurich, Switzerland
15.50: C14.3: Towards AES crypto-chip resistant to different power analysis
N. Pramstaller, F.K. Gürkaynak1, S. Haene1, K. Kaeslin2, N. Felber1, W. Fichtner1
University of Graz, Austria
1Integrated Systems Laboratory, ETH Zurich, Switzerland
2Microelectronic Design Center, ETH Zurich, Switzerland
Session C15: DIGITAL CIRCUITS
Chair: Stefan Rusu, Intel, USA
15.00: C15.1: A delay-encoding-logic array processor for dynamic programming matching
M. Ogawa, T. Shibata
Department Frontier Informatics, University of Tokyo, Japan
15.25: C15.2: A power-efficient 4-PAM signaling scheme with conventional encoder in space for chip-to-chip communication
K. Farzan, D.A.Johns
Department of Electrical Engineering, University of Toronto, Canada
15.50: C15.3: Dual-level LVDS technique for reducing the data transmission lines by half of LCD driver IC (S)
S.-H. Kim, S.-H. Yang, K.-R. Cho
Chungbuk National University, Cheongju, Korea
C15.4:
Adaptive threshold scheme to operate long on-chip buses at the limit of signal
integrity (S)
A. Katoch, M. Garg, E. Seevinck, H. Veendrick1
Philips Research Laboratories, Eindhoven, The Netherlands
1Circuit Research International, Nijmegen, The Netherlands
16.15: Coffee Break
Session C16: RF SYSTEMS
Chair: Didier Belot, STMicroelectronics, USA
16.40: C16.1: On-chip versus off-chip passives in multi-band radio design
X. Duo, T. Torikka, L-.R. Zheng, M. Ismail1, H. Tenhunen
Laboratory of Electronics and Computer Systems, KTH, Kista, Sweden
1Spirea AB, Stockholm, Sweden
17.05: C16.2: A mixed-signal integrated circuit for FM-DCSK modulation
M. Delgrado-Restituto, A.J. Acosta, A. Rodríguez-Vazquez
IMSE-SNM (CSIC), Sevilla, Spain
17.30: C16.3: Design of a highly integrated tuner suitable for analog and digital TV systems
R. Berenguer, E. Hernández, N. Rodríguez, I. Cendoya1, A. Muňnoz1, H. Solar1
C.E.I.T, san Sebastian, Spain
1University of Navarra, Pamplona, Spain
Session C17: FLASH
Chair: Kari Halonen, Helsinki University of Technology, Finland
16.40: C17.1: A 6bit, 1.2 GSps low-power flash-ADC in 0.13 mm digital CMOS
C. Sandner, M. Clara, A. Santner, T. Hartig, F. Kuttner
Infineon Technologies Austria, Villach, Austria
17.05: C17.2: A 1. GS/s, 16 times interleaved track and hold with 7.6 ENOB in 0.12 mm CMOS
S.M. Louwsma. E.J.M. van Tuijl, M. Vertregt, P.S.S. Scholtens, B. Nuta
MESA+, University of Twente, Enscchede, The Netherlands
17.30: C17.3: 4 GB/s
track and hold circuit using parasitic capacitance canceller (S)
T. Sato, S. Takagi, N. Fujii, Y. Hashimoto1, K. Sakata1, H. Okada1
Tokyo Institute of Technology, Japan
1STARC, Yokohama, Japan
Session C18: DSP CIRCUIT TECHNIQUES
Chair: Doris Schmitt-Landsiedel, University of Munich, Germany
16.40: C18.1: A cavity channel SESO embedded memory with low standby-power techniques
B. Atwood, T. Ishii, T. Watanabe, T. Mine, N. Kameshiro, T. Sano, K. Yano
Central Research Laboratory, Hitachi, Kokubunji, Japan
17.05: C18.2: High-bit-rate low-power decision circuit using InP/InGaAs HBT technology
K. Ishii, H. Nosaka, M. Ida, K. Kurishima. M. Hirata, T. Enoki, T. Shibata
NTT Photonics Laboratories, NTT, Kanagawa, Japan
17.30: C18.3: 1-58 Gb/s
PRBS generator with <1.1> ps RMS jitter in InP technology
H. Veenstra
Philips Research, Eindhoven, The Netherlands
19.30: Conference Dinner
08.40: Presentation ESSDERC/ESSCIRC 2005
09.00: Joint Plenary Keynote Presentation 5
Chair: Thomas Skotnicki, STMicroelectronics, Crolles, France
Speaker: Richard Friend, Cambridge University, United Kingdom
“Organic electronics for LED
applications”
09.40: Coffee Break
10.10: ESSCIRC Plenary Session 3
Chair: W. Simbuerger, Infineon Technologies, Germany
Speaker: Gene Frantz, TI, Houston, U.S.A.
" DSP, a technology, a product, a
revolution”
Chair: Werner Simbuerger, Infineon Technologies, Germany
10.50: C19.1: A 10 GHz
SiGe OC192 frequency synthesizer using a passive feed-forward loop filter and a
half rate oscillator
A. Maxim
Integrated Products, Monterrey, U.S.A.
11.25: C19.2: A 10 GHz frequency synthesizer for 802.11a in 0.18 mm CMOS
N. Pavlovic, J. Gosselin, K. Mistry, D. Leenaerts
Philips Research, Eindhoven, The Netherlands
11.40: C19.3: A low jitter triple-band digital LC PLL in 130 nm CMOS
N. Da Dalt, E. Thaller, P. Gregorius1, L. Gazsi1
Infineon Technologies Austria, Villach, Austria
1Infineon Technologies, Munich, Germany
12.05: C19.4: A 0.8-8 GHz
9.7mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock
generator (S)
T.-T. Liu, C.-K. Wang
National Taiwan University, Tapei, Taiwan
C19.5:
Digital delay locked loop with open-loop digital cycle corrector for 1.2
GHz/s/pin double data rate SDRAM (S)
C. Jeong, C. Yoo, J.-J. Lee, J.Kihk1
Electrical and Computer Engineering, Hanyang University, Seoul, Korea
1Hynix Semiconductor, Ichon, Korea
Chair: Jan Sevenhans, LEA ABC, Antwerpen, Belgium
10.50: C20.1: A small ripple regulated charge pump with automatic pumping control schemes
S.-E. Kim, S.-J. Song, J.K. Kim, S. Kim, J.-Y. Lee, H.-J. Yoo
KAIST, Daejeon, Korea
11.15: C20.2: A
mixed-signal chip with HV-protected plus in 0.35 mm based
HV-technology
W. Van de Maele, F. Stevens, A. Huot-Marchand, B. Sekerkiran
AMI Semiconductor Belgium, Oudenaarde, Belgium
11.40: C20.3: Temperature
referenced supply voltage and forward-body bias control (TSFC) architecture for
minimum power consumption (S)
G. Ono, M. Yiyazaki, H. Tanaka, N. Ohkubo, T. Kawahara
Central Research Laboratories, Hitachi, Kokubunji, Japan
C20.4: A
Low-power clock generator for system-on-chip (SoC) processors
(S)
A.M.Fahim
Qualcomm Inc., San Diego, U.S.A.
12.05: C20.5: A novel active feedback flyback
J. Wouters, J. Sevenhans1, S. van hoogenbenut1, T. Fernandez2, J. Briggs3, C. Das, S. Dupont
IMEC, Leuven, Belgium
1LEA ABC, Antwerpen, Belgium
2LEA S.A., Courbevoie, France
3LEA UK, Kent, United Kingdom
Chair: Christoph Hagleitner, IBM Research, Rüschlikon, Switzerland
10.50: C21.1: Low Temperature polycrystalline silicon TFT fingerprint sensor with integrated comparator circuit
H. Hara, M. Sakurai1, M. Miyasaka, S.W.B. Tam2
Seiko Epson Corp., Nagano, Japan
1Seiko Epson Corp., Tsukuba, Japan
2Cambridge Research Laboratory of Epson, Cambridge, United Kingdom
11.15: C21.2: Quadrature
oscillator with pre-distorted waveforms for application in MEMS-based mechanical
spectrum analyzer
G. de Graaf, L. Mol, L. Rocha, E.Cretu1, R.F. Wolffenbuttel
Delft University of Technology
1Melexis, Tessenderloo, Belgium
11.40: C21.3:
High-sensitivity, high-dynamic range 768x576 pixel CMOS image
sensor
W. Brockherde, A. Bussmann1, C.Nitta, B.J. Hosticka, R. Wertheimer2
Fraunhofer Institute of Circuits and Systems, Duisburg, Germany
1Helion GmbH, Duisburg, Germany
2BMW Group Forschung und Technik, Munich, Germany
12.05: C21.4: A colour
3200 fps high-speed CMOS imager for endoscopy in bio-medical applications
(S)
F. Lustenberger, M. Lehmann, L. Cavalier, N. Blanc, W. Heppner1, J. Ernst1, St. Gick1, H. Bloss1
CSEM, Zurich, Switzerland
1Fraunhofer IIS, Erlangen, Germany
C21.5: A
16x16 pixel range-finding CMOS image sensor (S)
D. Stoppa, L. Viarani, A. Simoni, L. Gonzo, M. Malfatti, G. Pedretti
ITC-irst, Trento, Italy
12.30: Lunch Break
14.00: ESSDERC/ESSCIRC 2003 Paper Award Session
14.15: Joint Plenary Keynote Presentation 6
Chair: Andreas Kaiser, ISEN, University of Lille, France
Speaker: Herman Casier, AMI Semiconductor Belgium, Oudenaarde, Belgium
“Technology considerations for
Automotive”
Chair: Frederic Stubbe, STMicroelectronics Belgium, Belgium
15.15: C22.1: A dual-mode low-pass filter for 802.11b/bluetooth receiver
A. N. Mohieldin, E. Sánchez-Sinencio1
Texas Instruments, Dallas, U.S.A.
1Texas A&M University, College Station, Texas, U.S.A.
15.40: C22.2: An integrated laser radar receiver with resonance-based timing discrimination
J. Pehkonen, J. Kostamovaara
Dept. Electrical and Information Engineering, University of Oulu, Finland
16.05: C22.3: A low power highly linear 2.4 GHz CMOS receiver front-end using current amplifier (S)
I. Kwon, K. Lee
KAIST, Daejeon, Korea
C22.4:
Fully integrated ultra wide band CMOS low noise amplifier (S)
C. Grewing, M. Friedrich, G. Puma, C. Sandner1, S. van Waasen, A. Wiesbauer1, K. Winterberg
Infineon Technologies, Dusseldorf, Germany
1Infineon Technologies Austria, Villach, Austria
16.30: C22.5: A 100 MHz timing generator for impulse radio applications (S)
C.-P. Wu, H.-W. Tsao
National Taiwan University, Tapei, Korea
Chair: Stephane Donnay, IMEC, Leuven, Belgium
15.15: C23.1: A chopped Hall sensor with programmable ‘true-power-on” function
M. Motz, D. Draxelmayr, T. Werth, B. Forster
Infineon Technologies Austria, Villach, Austria
15.40: C23.2: An
EMC-robust high voltage system-on-chip (S)
E. Vander Voorde, K. Appeltans, J. Alonso
AMI Semiconductor Belgium, Oudenaarde, Belgium
C23.3: Circuit for readout and linearisation of sensor bridges (S)
G. de Graaf, R.F. Wolffenbuttel
EEMC/ME, DIMES/EI, Delft University of Technology, Delft, The Netherlands
16.05: C23.4: New implantable stimulator for the FES of paralyzed muscles (S)
J.D. Techer, S. Bernard, Y. Bertrand, G. Cathébras, D. Guiraud
LIRMM, University of Montpellier, France
C23.5:
An analog front-end for remote sensor applications with high input common-mode
rejection including a 16bit ED ADC
in 0.35 mm 3.3 V
CMOS process (S)
E. Compagne, S. Maulet, S. Genevey
Dolphon Integration, Meylan, France
16.30: C23.6: A
CMOS-based tactile sensor for continuous blood pressure
monitoring
K.-U. Kirstein, J. Šedivy, T. Salo, C. Hagleitner1, T. Vančura, H. Baltes
Physical Electronics Laboratory, ETH Zurich, Switzerland
1IBM Research, Zurich Research Laboratory, Rüschlikon, Switzerland
Chair: Herbert Grünbacher, TU Vienna, Austria
15.15: C24.1: A physically oriented model to quantify the dynamic noise margin
T. Gemmeke, T.G. Noll
1EECS, RWTH Aachen University, Germany
15.40: C24.2: A 1.35 V
sense amplifier for non volatile memories based on current mode approach
(S)
A. Conte, G. Lo Giudice, G. Palumbo1, S. Signorello
STMicroelectronics, Catania, Italy
1DIEES, University of Catania, Italy
C24.3: A low-swing
single-ended L1 cache bus technique for sub-90 nm technologies
(S)
P. Caputa, M.A. Anders, C. Svensson, Ram. K. Krishnamurthy1, S. Borkar1
Electronic devices Dept., University of Linköping, Sweden
1Circuits Research Labs, Intel, Hillsboro, U.S.A.
16.05: C24.5: An area-efficient high-speed
Reed-Solomon decoder in 0.25 mm CMOS
(S)
A.G.M. Strollo, N. Petra, D. De Caro, E. Napoli
University of Naples “Federico II”, Naples, Italy
C24.6: A dual mode
channel decoder for 3GPP2 mobile wireless communications (S)
C.-C. Lin, Y.-H. Shih, H.-C. Chang, C.-Y. Lee
National Chiao Tung University, Hsinchu, Taiwan
16.30: C24.7: A 2.5 Gbps – 3.125 Gbps multi-core serial-link transceiver in 0.13 mm CMOS (S)
T. Geurts, W. Rens, J. Crols, S. Kashiwakura1, Y. Segawa1
AnSem, Heverlee, Belgium
Kawasaki Microelectronics, Chiba, Japan
C24.8: A 4-channel
2.5 Gb/s/channel 66 DBZ inductorless transimpedance amplifiers
(S)
P.Muller, Y. Leblebici, M.K. Emsley1, M. Selim Unlü1
EPFL, Lausanne, Switserland
1Boston University Photonics Center, U.S.A.
16.55: End of conference